Workshop on

The challenges of achieving power and performance efficiencies for HPC:

 from design-space exploration to dynamic optimization

June 10th 2014

Preliminary Schedule

 

Invited Keynote Presentation

8:30       New Rules: Sustaining Performance Scaling in a Physical World

Sudhakar Yalamanchili, School of Electrical and Computer Engineering,

Georgia Institute of Technology

 

Session 1:

9:30       Performance and power models for optimal resource efficiency

               Georg Hager

University of Erlangen, Germany

10:00     Over-provisioned Systems: Opportunity or Unmanageable Risk?
Martin Schulz

Lawrence Livermore National Lab, USA

 

10:30     Coffee Break

 

Session 2:

11:00     Using Automated Performance Modeling to Find Scalability Bugs in Complex Codes

               Torsten Hoefler

ETH ZŸrich, Switzerland

11:30     Dynamically steering power in large-scale systems

               Darren J. Kerbyson, Kevin J. Barker, Adolfy Hoisie

Pacific Northwest National Lab

 

Panel:

12:00     Achieving future power and performance efficiencies

12:30     Closing Remarks

 

 

Workshop Chairs: Adolfy Hoisie, Darren J. Kerbyson, Pacific Northwest National Laboratory