Workshop on Large-Scale Parallel Processing

to be held at the

IEEE International Parallel and Distributed Processing Symposium

Chicago, IL

May 23rd - 27th, 2016

Preliminary schedule is now available

Keynote Presentation at 9:00am

The transformation of supercomputing facilities

Michael Papka

ALCF Director and Deputy Associate Laboratory Director, Argonne National Laboratory

We will discuss how supercomputing facilities will need to transform over the next decade to meet the data-driven and explorative requirements of science. The traditional computing facility has evolved very little in its model of use over the past twenty years. Jobs are typically batched scheduled; users submit their jobs to a queue and wait patiently for their time to come and their job to execute. If there are problems, they are discovered during the post execution analysis or during examination of the job failure logs, and this leads to a significant loss in productivity. Furthermore, this mode of interaction does not support the exploration mode of scientific inquiry as simulation output becomes too unwieldy to either store or interact with during the analysis phase and completely ignores the demands of the latest experimental facilities and the vast amount of data they generate. To overcome these obstacles, it is paramount for a scientist to interact in real-time with the supercomputers and explore their data and simulations. We will discuss how a high performance computing center might need to evolve to meet these requirements and I will use the Argonne Leadership Computing Facility as an example. We will also discuss the structure and mission of the facility, the acquisition and deployment of new hardware and the changes we see coming. These changes are driven by a number of different forces and I will focus on the opportunities new hardware provides, the challenges of new use cases, and the transformations of facilities to meet these requirements.

The workshop on Large-Scale Parallel Processing is a forum that focuses on computer systems that utilize thousands of processors and beyond. Large-scale systems, referred to by some as extreme-scale and Ultra-scale, have many important research aspects that need detailed examination in order for their effective design, deployment, and utilization to take place. These include handling the substantial increase in multi-core on a chip, the ensuing interconnection hierarchy, communication, and synchronization mechanisms. Increasingly this is becoming an issue of co-design involving performance, power and reliability aspects. The workshop aims to bring together researchers from different communities working on challenging problems in this area for a dynamic exchange of ideas. Work at early stages of development as well as work that has been demonstrated in practice is equally welcome.

Of particular interest are papers that identify and analyze novel ideas rather than providing incremental advances in the following areas:

Large-scale systems: exploiting parallelism at large-scale, the coordination of large numbers of processing elements, synchronization and communication at large-scale, programming models and productivity

Novel architectures and experimental systems : the design of novel systems, the use emerging technologies such as Non-Volatile Memory, Silicon Photonics, application-specific accelerators and future trends.

Monitoring, Analysis, and Modeling: tools and techniques for gathering performance, power, thermal, reliability, and other data from existing large scale systems, analyzing such data offline or in real time for system tuning, and modeling of similar factors in projected system installations.

Multi-core: utilization of increased parallelism on a single chip, the possible integration of these into large-scale systems, and dealing with the resulting hierarchical connectivity.

Energy Management: Techniques, strategies, and experiences relating to the energy management and optimization of large-scale systems.

Applications: novel algorithmic and application methods, experiences in the design and use of applications that scale to large-scales, overcoming of limitations, performance analysis and insights gained.

Results of both theoretical and practical significance will be considered, as well as work that has demonstrated impact at small-scale that will also affect large-scale systems. Work may involve algorithms, languages, various types of models, or hardware. A list of papers presented at previous LSPP workshops can be found here.

In previous years selected work presented at the workshop has been published in a special issue of Parallel Processing Letters. Special issues of Parallel Processing Letters from LSPP workshops previously appeared in 2014, 2013, 2011, 2010, 2009 and 2008.

Submission Guidelines

Papers should not exceed ten single-space pages (including figures, tables and references) using a 12-point on 8½x11-inch pages. Submissions in PostScript or PDF should be made using EasyChair. Informal enquiries can be made to Kevin Barker. Submissions will be judged on correctness, originality, technical strength, significance, presentation quality and appropriateness. Submitted papers should not have appeared in or under consideration for another venue.

Important Dates

Submission opens: October 30th 2015
Papers due: Extended January 28th 2016
Notification of acceptance: Februrary 14th 2016
Camera-Ready Papers due: February 26th 2016

Workshop Organization

Workshop Chairs
Kevin J. Barker Pacific Northwest National Laboratory
Chris Carothers RPI
Eric van Hensbergen ARM

Additional Steering Committee Members
Darren J. Kerbyson Pacific Northwest National Laboratory
Ram Rajamony IBM Austin Research Lab
H.J. Siegel Colorado State University
Charles Weems University of Massachusetts

Provisional Program Committee will appear here shortly

Workshop General Chair and point of contact: Kevin J. Barker