Workshop on Large-Scale Parallel Processing
to be held at the
IEEE International Parallel and Distributed Processing Symposium
May 20th - 24th, 2013
Preliminary schedule is now available
Keynote Presentation at 8:15am
From Sensors to Smartphones to Servers to Supercomputers
Eric Van Hensbergen
As high performance computing marches towards exascale, energy has become increasingly an important factor with the funding agencies setting a target for systems 50 times more power efficient than today's supercomputers. This focus on energy efficiency has brought an increased interest in ARM technology to be the engine of next generation HPC. ARM is approaching HPC from multiple directions, bringing to bear our high performance server cores, our low-power application cores, our energy efficient GPGPUs, and our heterogenous big.LITTLE architecture capabilities. ARM's strength is relatively small, extremely energy efficient cores resulting in the ability to fit many more cores on a chip and many more nodes in a system. The challenge is constructing applications and runtimes to leverage the increased parallelism at a node and cluster level in an equally energy efficient manner. This talk will give an overview of relevant ARM technologies which are being evaluated for large-scale high performance computing, discuss some of the tradeoffs of the different options, and the challenges posed by the increased parallelism at different levels of the system.
The workshop on Large-Scale Parallel Processing is a forum that focuses on computer systems that utilize thousands of processors and beyond. Large-scale systems, referred to by some as extreme-scale and Ultra-scale, have many important research aspects that need detailed examination in order for their effective design, deployment, and utilization to take place. These include handling the substantial increase in multi-core on a chip, the ensuing interconnection hierarchy, communication, and synchronization mechanisms. Increasingly this is becoming an issue of co-design involving performance, power and reliability aspects. The workshop aims to bring together researchers from different communities working on challenging problems in this area for a dynamic exchange of ideas. Work at early stages of development as well as work that has been demonstrated in practice is equally welcome.
Of particular interest are papers that identify and analyze novel ideas rather than providing incremental advances in the following areas:
Large-scale systems: exploiting parallelism at large-scale, the coordination of large numbers of processing elements, synchronization and communication at large-scale, programming models and productivity
Multi-core: utilization of increased parallelism on a single chip, the possible integration of these into large-scale systems, and dealing with the resulting hierarchical connectivity.
Novel architectures and experimental systems : the design of novel systems, the use emerging technologies such as Non-Volatile Memory, Silicon Photonics, application-specific accelerators and future trends.
Energy Management: Techniques, strategies, and experiences relating to the energy management and optimization of large-scale systems.
Warehouse Computing: dealing with the issues in advanced datacenters that are increasingly moving from co-locating many servers to having a large number of servers working cohesively, impact of both software and hardware designs and optimizations to achieve best cost-performance efficiency.
Applications: novel algorithmic and application methods, experiences in the design and use of applications that scale to large-scales, overcoming of limitations, performance analysis and insights gained.
Results of both theoretical and practical significance will be considered, as well as work that has demonstrated impact at small-scale that will also affect large-scale systems. Work may involve algorithms, languages, various types of models, or hardware. A list of papers presented at previous LSPP workshops can be found here.
|Selected work presented at the workshop will be published in a special issue of Parallel Processing Letters in late 2013. Special issues of Parallel Processing Letters from LSPP workshops previously appeared in 2011, 2010, 2009 and 2008.|
Papers should not exceed eight single-space pages (including figures, tables and references) using a 12-point on 8½x11-inch pages. Submissions in PostScript or PDF should be made using EDAS. Informal enquiries can be made to Darren Kerbyson. Submissions will be judged on correctness, originality, technical strength, significance, presentation quality and appropriateness. Submitted papers should not have appeared in or under consideration for another venue.
|Submission opens:||October 1st 2012|
|Notification of acceptance:|
|Camera-Ready Papers due:|
|Darren J. Kerbyson||Pacific Northwest National Laboratory|
|Ram Rajamony||IBM Austin Research Lab|
|Charles Weems||University of Massachusetts|
|Johnnie Baker||Kent State University|
|Alex Jones||University of Pittsburgh|
|H.J. Siegel||Colorado State University||Lixin Zhang||Institute of Computing Techology, Chinese Academy of Sciences||Guangming Tan||Institute of Computing Techology, Chinese Academy of Sciences|
|Pavan Balaji||Argonne National Laboratory, USA|
|Kevin J. Barker||Pacific Northwest National Laboratory, USA|
|Laura Carrington||San Diego Supercomputer Center, USA|
|I-Hsin Chung||IBM T.J. Watson Research Lab, USA|
|Tim German||Los Alamos National Laboratory, USA|
|Georg Hager||University of Erlangen, Germany|
|Simon Hammond||Sandia National Laboratory, USA|
|Martin Herbordt||Boston University, USA|
|Stephen Jarvis||University of Warwick, UK|
|Daniel Katz||University of Chicago, USA|
|John Michalakes||National Renewable Energy Laboratory, USA|
|Celso Mendes||University of Illinois Urbana-Champagne, USA|
|Bernd Mohr||Forschungszentrum Juelich, Germany|
|Phil Roth||Oak Ridge National Laboratory, USA|
|Jose Sancho||Barcelona Supercomputer Center, Spain|
|Gerhard Wellein||University of Erlangen, Germany|
|Pat Worley||Oak Ridge National Laboratory, USA|
|Ulrike Yang||Lawrence Livermore National Laboratory, USA|
Workshop General Chair and point of contact: Darren J. Kerbyson