Workshop on Modeling & Simulation of Exascale Systems & Applications
September 18th-19th, 2013
University of Washington, Seattle, WA
Adolfy Hoisie (Chair), Laura Carrington, Darren Kerbyson, Bob Lucas, David Nicol, Boyana Norris, Arun Rodrigues, John Shalf, Doug Thain, Jeffrey Vetter, Sudhakar Yalamanchili
William Harrod (DOE/ASCR), Rich Carlson (DOE/ASCR), Almadena Chtchelkanova (NSF), Thuc Hoang (DOE/NNSA), Sonia Sachs (DOE/ASCR), John West (DOD)
Multiple significant technical challenges punctuate the path to Exascale. Millions of threads of parallelism need be tractable and manageable. New algorithms and programming models may be required that can utilize these extreme levels of parallelism and can be efficiently mapped to system resources.
Power efficiency is emerging as the overarching design constraint. The cost of data movement in both power and performance is larger than the cost of the arithmetic and may be one order of magnitude or more, higher on the way to Exascale using current technologies. High-speed interconnect networks and communication mechanisms need to cope with the realities of size and complexity within a limited power envelope, which may require streamlined lower-dimensionality topologies. The increase in the depth of memory hierarchies, including additional layers in the I/O and storage subsystem design through the likely addition of power efficient non-volatile memories, leads to increased distances for data to travel as well as increased programming complexity.
An important issue to overcome with Exascale is the intrinsic limitation in reliability given the size and complexity of the systems that will require increased resiliency. There is no one size fits all solution and the challenge ahead is dealing with the combined reliability & power & performance requirements and their tradeoffs at all levels of the stack between the hardware and application.
In a nutshell, at this juncture in time when the HPC community led by DOE is embarking on the path to Exascale, the issue of optimal co-design of Exascale applications and systems takes center stage.
This workshop is convened to address the role of modeling and simulation, as a set of methodologies, in guiding the optimal co-design of Exascale systems and applications. In the two days of this event we plan to:
- Survey the state-of-the-art in modeling and simulation
- Identify the key areas of co-design where M&S can have a significant impact
- Discuss the architectural trends that are likely to materialize at Exascale and the ways to capture those in models
- Identify the areas of R&D in this arena that require pointed and/or joint efforts
- Engage in in-depth technical discussions pointing to increased accuracy, coverage, and impact of M&S
- Help define and foster our technical community and its interactions with other topical or broader Exascale endeavors
- Discuss the best ways of disseminating our methodologies, tools, and software
It is expected the outcome of the workshop will impact not only Exascale, but the HPC community in general. We anticipate that this event will be the first in a series with the goal of assessing our progress and point to areas in need of increased emphasis.