IA3 2015

5th Workshop on Irregular Applications:

Architectures and Algorithms

 
 

Sunday, November 15 2015

Salon A

Hilton Austin Hotel

Austin, TX, USA


To be held in conjunction with                                                     To be held in cooperation with








Preliminary Program


9:00-9:40         Keynote 1 – Algorithms - Chair: John Feo (PNNL)

                        How to Match in Parallel: Approximation Algorithms and Multicore

                        Machines

                        Alex Pothen, Purdue University


9:40-10:00       Session 1 - Irregular Algorithms

                        Chair: Antonino Tumeo (PNNL)


9:40-9:50         PathFinder: A Signature-search Miniapp and its Runtime Characteristics

                       Aditya Deshpande, Jeffrey Draper, J. Brian Rigdon and Richard Barrett.


9:50-10:00       A GPU-Parallel Construction of Volumetric Tree

                        Mohammad M. Hossain, Thomas R. Kurfess, Richard W. Vuduc

                        and Thomas M. Tucker.


10:00-10:30     Coffee Break


10:30-11:15      Session 2: Irregular Applications and GPUs

                         Chair: Marco Minutoli (PNNL)


10:30-10:55      Data-centric GPU-based Adaptive Mesh Refinement

                         Mohamed Wahib and Naoya Maruyama.


10:55-11:05      Dynamic Parallelism for Simple and Efficient GPU Graph Algorithms

                         Peter Zhang, Eric Holk, John Matty, Samantha Misurda,

                         Marcin Zalewski, Scott McMillan, Jonathan Chu and Andrew Lumsdaine.


11:05-11:15      Betweenness Centrality on Multi-GPU systems

                         Massimo Bernaschi, Giancarlo Carbone and Flavio Vella.


11:15-12:30      Session 3: Sparse Matrices

                         Chair: Alessandro Morari (PNNL)


11:15-11:40     Scalable Task-Based Algorithm for Multiplication of Block-Rank-Sparse

                         Matrices

                         Justus Calvin, Cannada Lewis and Edward Valeev.


11:40-12:05      Tensor-Matrix Products with a Compressed Sparse Tensor

                         Shaden Smith and George Karypis


12:05-12:30      Generalised vectorisation for sparse matrix--vector multiplication

                         Albert-Jan Yzelman


2:00-2:40          Keynote 2 – Architectures - Chair: Oreste Villa (NVIDIA)

                         A Scalable Architecture for Ordered Irregular Parallelism

                         Daniel Sanchez (MIT)


2:40-3:00          Session 4 - Graph Algorithms vs Modern Architectures

                         Chair: Mahantesh Halappanavar (PNNL)


2:40-2:50          GAIL: The Graph Algorithm Iron Law

        Scott Beamer, Krste Asanovic and David Patterson.


2:50-3:00          Improving Graph Partitioning for Modern Graphs and Architectures

                         Dominique Lasalle, Mostofa Patwary, Nadathur Satish,

                         Narayanan Sundaram, George Karypis and Pradeep Dubey.


3:00-3:30         Coffee Break


3:30-4:20          Session 5 - Architectural implications of data-centric workloads

                         Chair: Vito Giovanni Castellana (PNNL)


3:30-3:55          Hybrid Memory Cube performance characterization on data-centric

                         workloads

                         Maya Gokhale, Scott Lloyd and Chris Macaraeg.


3:55-4:20          PL2AP: Fast Parallel Cosine Similarity Search

                         David C. Anastasiu and George Karypis.


4:20-5:30         Panel Session: The Future of Irregular Applications

                        Moderator: David Haglin (PNNL).


                         Panelists:    John Gilbert (UCSB), Jay Rockstroh (Data Vortex),

                                             Nuwan Jayasena (AMD), Brad Spiers (Micron),

                                             Ruud van der Pas (Oracle), Daniel Sanchez (MIT),

                                             Alex Pothen (Purdue)