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Monday, November 13, 2017

Colorado Convention Center

Room 507

Denver, CO

Program

9:00 - 9:10      Welcome and Introduction

                        Antonino Tumeo, John Feo, Vito Giovanni Castellana

9:10 - 9:50     Keynote 1 - Chair: John Feo (PNNL)

                        A Taxonomy of HPDA Algorithms

                        Steve Conway (Hyperion Research)

9:50 - 10:00     Session 1: Parallel Algorithms

                        Chair: Marco Minutoli (PNNL & WSU)

                        Accelerating Energy Games Solvers on Modern Architectures

                Andrea Formisano, Raffaella Gentilini and Flavio Vella

10:00 - 10:30  Coffee Break

10:30 - 11:30   Session 2: Load Balancing

                        Chair: Scott Beamer (LBNL)

10:30 - 10:55   Overcoming Load Imbalance for Irregular Sparse Matrices

                Goran Flegar and Hartwig Anzt

10:55 - 11:20    Progressive load balancing of asynchronous algorithms

                 Justs Zarins and Michele Weiland

11:20 - 11:30    Enabling Work-Efficiency for High Performance Vertex-Centric

                        Graph Analytics on GPUs

                 Farzad Khorasani, Keval Vora, Rajiv Gupta and Laxmi N. Bhuyan

11:30 - 12:30   Session 3: Parallel Irregular Algorithms

                        Chair: Ryan Friese (PNNL)

11:30 - 11:55   Parallel Depth-First Search for Directed Acyclic Graphs

                Maxim Naumov, Alysson Vrielink and Michael Garland

11:55 - 12:20   Optimizing Word2Vec Performance on Multicore Systems

                Vasudevan Rengasamy, Tao-Yang Fu, Wang-Chien Lee

                and Kamesh Madduri

12:20 -12:30    Spherical Region Queries on Multicore Architectures

                Hao Lu, Sudip Seal, Wei Guo and Jonathan D. Poplawsky

12:30 - 2:00      Lunch Break (on your own)

2:00 - 2:50       Keynote 2 - Chair: Vito Giovanni Castellana (PNNL)

                        Quantum Computing and Irregular Applications

                        Prof. Fred Chong (University of Chicago)

2:50 - 3:00      Session 4: Data Layouts

                       Chair: Marco Minutoli (PNNL & WSU)

                       An Efficient Data Layout Transformation Algorithm for Locality-Aware

                       Parallel Sparse FFT

                       Cheng Wang, Sunita Chandrasekaran and Barbara Chapman

3:00 - 3:30     Coffee Break

3:30 - 4:30     Session 5: Architecture for Irregular Applications

                       Chair: Oreste Villa (NVIDIA)

3:30 - 3:55     A Case for Migrating Execution for Irregular Applications

              Peter Kogge and Shannon Kuntz

3:55 - 4:20     Pressure-Driven Hardware Managed Thread Concurrency for Irregular

                       Applications

             John Leidel, Xi Wang and Yong Chen

4:20 - 4:30     Evaluation of Knight Landing High Bandwidth Memory for HPC Workloads

                      Solmaz Salehian and Yonghong Yan

4:30 - 5:30     Debate - Moderator: Ruud Van Der Pas (Oracle)

                       Proposition: "Specialized, perhaps configurable, hardware and software

                       are necessary to achieve high-performance, scalable data analytics"

                      Panelists: Rich Vuduc (Georgia Tech), Franz Franchetti (CMU),

                      Eric Van Hensbergen (ARM), David Wang (Samsung)