SODA Synthesizer: Accelerating Artificial Intelligence Applications

with an End-to-End Compiler-Based Toolchain

ISFPGA 2026 – Sunday, February 22, 2026

Nicolas Bohm Agostini (PNNL), Vito Giovanni Castellana (PNNL),

Fabrizio Ferrandi (Politecnico di Milano), Antonino Tumeo (PNNL)

Abstract

Field-programmable gate arrays (FPGAs) have emerged as compelling platforms for artificial intelligence applications (machine learning, graph analytics) due to their reconfigurability, energy efficiency, and ability to provide customized architectures for rap-idly evolving algorithms. However, the constant evolution of AI models and the complexity of modern FPGA architectures make conventional hardware design cycles challenging to sustain. New agile hardware design methods and tools that can convert high-level algorithm descriptions into optimized FPGA implementations while exploring contrasting design metrics with minimal human intervention are critically needed. This tutorial will discuss methodologies, trends, advantages, benefits, and remaining challenges for agile reconfigurable hardware design tools based on compiler and high-level synthesis (HLS) technologies. The tutorial will provide hands-on experience with the SOftware Defined Accelerators (SODA) Synthesizer, an open-source compiler-based toolchain composed of SODA-OPT, a front-end and optimizer that interfaces with productive Python-based data science frameworks using the MLIR framework, and Bambu, the most advanced open-source HLS tool available. Unlike conventional HLS tools that focus on single-threaded, loop-based kernels, SODA and Bambu introduce novel synthesis methodologies for task-parallel specifications, coarse-grained dataflow architectures, and multi-threaded accelerators specifically designed for data-intensive and irregular applications. The toolchain generates optimized accelerators for multiple FPGA families and uniquely extends to ASIC flows (including integration with OpenROAD), providing an end-to-end solution from Python to silicon across both reconfigurable and fixed-function platforms.

 

 

Reading list

✔    Papers:

o   Zhang, J.J., Agostini, N.B., Song, S., Tan, C., Limaye, A., Amatya, V., Manzano, J., Minutoli, M., Castellana, V.G., Tumeo, A. and Wei, G.Y., 2021, July. Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis. In 2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP) (pp. 218-225).

o   Ferrandi, F., Castellana, V.G., Curzel, S., Fezzardi, P., Fiorito, M., Lattuada, M., Minutoli, M., Pilato, C. and Tumeo, A., 2021, December. Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications. In 2021 58th ACM/IEEE Design Automation Conference (DAC) (pp. 1327-1330).

o   Minutoli, M., Castellana, V.G., Saporetti, N., Devecchi, S., Lattuada, M., Fezzardi, P., Tumeo, A. and Ferrandi, F., 2021. Svelto: High-level synthesis of multi-threaded accelerators for graph analytics. IEEE Transactions on Computers.

o   Agostini, N.B., Curzel, S., Kaeli, D., and Tumeo, A., 2022, May, SODA-OPT an MLIR based flow for co-design and high-level synthesis. In 2022 Proceedings of the 19th ACM International Conference on Computing Frontiers (CF) (pp. 201–202).

o   Agostini, N.B., Curzel, S., Amatya, V., Tan, C., Minutoli, M., Castellana, V.G., Manzano, J., Kaeli, D., and Tumeo, A. 2022. An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration. In Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design (ICCAD '22), Article 6, (pp. 1-9)

o   Agostini, N.B., Curzel, S., Zhang, J.J., Limaye, A., Tan, C., Amatya, V., Minutoli, M., Castellana, V.G., Manzano, J., Brooks, D. and Wei, G.Y., 2022, June. Bridging Python to Silicon: The SODA Toolchain. In IEEE Micro, 42(5), (pp. 78–88). BEST PAPER FOR 2022

o   Serena Curzel, Nicolas Bohm Agostini, Vito Giovanni Castellana, Marco Minutoli, Ankur Limaye, Joseph B. Manzano, Jeff Zhang, David Brooks, Gu-Yeon Wei, Fabrizio Ferrandi, Antonino Tumeo: End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators. IEEE Trans. Computers 71(12): 3074-3087 (2022)

o   Agostini, N.B., Haris, J., Gibson, P., Jayaweera, M., Rubin, N., Tumeo, A., Abellán, J.L., Cano, J., Kaeli, D.R., 2024, March, AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators. In proceedings of CGO 2024 (pp. 143-157)

✔    Additional material:

o   Other Bambu publications are listed on https://panda.dei.polimi.it/?page_id=177

o   Code repositories: https://github.com/ferrandi/PandA-bambu and https://github.com/pnnl/soda-opt

Tutorial setup

✔    Have a computer with access to internet and a valid Google account for the bambu part and access to a x86 machine with docker installed and 22GB free for the soda-opt part.

o   We will use two Jupiter Notebooks hosted on Google COLAB

▪       Notebook and material for Bambu: https://github.com/ferrandi/PandA-bambu/tree/dev/panda/documentation/bambu101

o   We will download a docker image with all tools installed: SODA docker image

▪       Notebook and material for SODA-OPT: https://github.com/pnnl/soda-benchmarks/tree/main/tutorials