Main Conference Program


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Day 1: September 23rd, Monday
8:00am-5:00pm Registration (Room: Foyer 3)
7:30am-8:20am Continental Breakfast (Room: Emerald Ballroom 2)
8:20am-8:30am Welcome from the Chairs (Room: Emerald Ballroom 1)
Andrew Lumsdaine, General Chair; P. (Saday) Sadayappan, Program Chair
8:30am-9:30am Keynote – Resource Efficiency and Performance in the Cloud (Room: Emerald Ballroom 1)
Speaker: Dr. Kathryn McKinley (Google)
Chair: Lawrence Rauchwerger (University of Illinois)
9:30am-10:00am Coffee Break
10:00am-12:00pm Session 1: Best-Papers Session (Room: Emerald Ballroom 1)
Chair: Muthu Baskaran (Reservoir Labs)
  MASR: A Modular Accelerator for Sparse RNNs [Paper]
Udit Gupta (Harvard University); Brandon Reagen (Facebook); Lillian Pentecost, Marco Donato, Thierry Tambe (Harvard University); Alexander Rush (Harvard SEAS); Gu-Yeon Wei, David Brooks (Harvard University)
  Gluon-Async: A Bulk-Asynchronous System for Distributed and Heterogeneous Graph Analytics [Paper]
Roshan Dathathri, Gurbinder Gill, Loc Hoang (University of Texas at Austin); Hoang-Vu Dang (University of Illinois at Urbana-Champaign); Vishwesh Jatala (University of Texas at Austin); V Krishna Nandivada (Indian Institute of Technology Madras); Marc Snir (University of Illinois at Urbana-Champaign); Keshav Pingali (University of Texas at Austin)
  BOLT: Optimizing OpenMP Parallel Regions with User-Level Threads [Paper]
Shintaro Iwasaki (The University of Tokyo); Halim Amer (Argonne National Labs); Kenjiro Taura (The University of Tokyo); Sangmin Seo, Pavan Balaji (Argonne National Laboratory)
  SMT-COP: Defeating Side-Channel Attacks on Execution Units in SMT Processors [Paper]
Daniel Townley (State University of New York at Binghamton); Dmitry Ponomarev (State Univeristy of New York at Binghamton)
12:00pm-12:10pm Callout: PACT20 (Room: Emerald Ballroom 1)
Hyesoon Kim, Program Chair, PACT20
12:10pm-1:30pm Lunch Buffet (Room: Emerald Ballroom 2)
1:30pm-3:00pm Session 2A: Compiler Optimization and Code Generation 1 (Room: Emerald Ballroom 1)
Chair: Ayal Zaks (Intel Haifa and Technion)
  Type-Directed Program Synthesis and Constraint Generation for Library Portability [Paper]
Bruce Collie, Philip Ginsbach, Michael F. P. O’Boyle (The University of Edinburgh)
  Deepframe: A Profile-driven Compiler for Spatial Hardware Accelerators [Paper]
Apala Guha, Naveen Vedula (Simon Fraser University); Arrvindh Shriraman (Simon-Fraser University)
  Fast Parallel Equivalence Relations in a Datalog Compiler [Paper]
Patrick Nappa, David Zhao (The University of Sydney, Australia); Pavle Subotic (Amazon); Bernhard Scholz (The University of Sydney, Australia)
  Session 2B: Memory/Storage Systems 1 (Room: Emerald Ballroom 3)
Chair: Biswabandan Panda (Indian Institute of Technology Kanpur)
  Enforcing Last-level Cache Partitioning through Memory Virtual Channels [Paper]
Jungwook Chung (Seoul National University); Yuhwan Ro (Samsung Electronics); Joonsung Kim (Seoul National University); Jaehyung Ahn (POSTECH); Jangwoo Kim (Seoul National University); John Kim (KAIST); Jae W. Lee, Jung Ho Ahn (Seoul National University)
  To Stack or Not to Stack [Paper]
Richard Afoakwa, Lejie Lu, Hui Wu, Michael Huang (University of Rochester)
  Enforcing Crash Consistency of Evolving Network Analytics in Non-Volatile Main Memory Systems [Paper]
Soklong Lim (Washington State University Vancouver); Zaixin Lu (Amazon); Bin Ren (College of William and Mary); Xuechen Zhang (Washington State University Vancouver)
3:00pm-3:30pm Coffee Break
3:30pm-4:30pm Session 3A: Hardware/Software for Security (Room: Emerald Ballroom 1)
Chair: Wu-Chun Feng (Virginia Tech.)
  Fooling the Sense of Cross-core Last-level Cache Eviction based Attacker by Prefetching Common Sense [Paper]
Biswabandan Panda (IIT Kanpur)
  SpecShield: Shielding Speculative Data from Microarchitectural Covert Channels [Paper]
Kristin Barber (The Ohio State University); Anys Bacha (University of Michigan); Li Zhou, Yinqian Zhang, Radu Teodorescu (The Ohio State University)
  Session 3B: Hardware/Software for Machine Learning (Room: Emerald Ballroom 3)
Chair: Cathie Olschanowsky (Boise State University)
  MOSAIC: Heterogeneity-, Communication-, and Constraint-Aware Model Slicing and Execution for Accurate and Efficient Inference [Paper]
Myeonggyun Han, Jihoon Hyun, Seongbeom Park, Jinsu Park, Woongki Baek (UNIST)
  Acorns: A Framework for Accelerating Deep Neural Networks with Input Sparsity [Paper]
Xiao Dong, Lei Liu, Xiaobing Feng (Institute of Computing Technology, Chinese Academy of Sciences)
6:00pm-8:00pm Poster Session & Reception (Room: Emerald Ballroom 2)
Click here for Poster list
Day 2: September 24th, Tuesday
8:00am-5:00pm Registration (Room: Foyer 3)
7:30am-8:30am Continental Breakfast (Room: Emerald Ballroom 2)
8:30am-9:30am Keynote – Bridging the Gap Between Deep Learning Models and “the Metal” with Apache TVM & VTA (Room: Emerald Ballroom 1)
Speaker: Dr. Luis Ceze (University of Washington)
Chair: Radu Teodorescu (Ohio State University)
9:30am-10:00am Coffee Break
10:00am-11:30am Session 4A: Concurrency Management (Room: Emerald Ballroom 1)
Chair: Yong Chen (Texas Tech. University)
  Forgive-TM: Supporting Lazy Conflict Detection In Eager Hardware Transactional Memory [Paper]
Sunjae Park (Georgia Institute of Technology); Christopher Hughes (Intel); Milos Prvulovic (Georgia Institute of Technology)
  Unfair Scheduling Patterns in NUMA Architectures [Paper]
Naama Ben-David, Ziv Scully, Guy E. Blelloch (Carnegie Mellon University)
  Optimizing Persistent Memory Transactions [Paper]
Pantea Zardoshti, Tingzhe Zhou (Lehigh University); Yujie Liu (Google); Michael Spear (Lehigh University)
  Session 4B: Heterogeneous Systems and Accelerators 1 (Room: Emerald Ballroom 3)
Chair: Huiyang Zhou (North Carolina State University)
  HeTM: Transactional Memory for Heterogeneous Systems [Paper]
Daniel Castro, Paolo Romano, Aleksandar Ilic (Instituto Superior Técnico & INESC-ID); Amin M Khan (UiT The Arctic University of Norway)
  Achieving scalability in a k-NN multi-GPU network service with Centaur [Paper]
Amir Wated (Technion and Cisco); Alexander Libov (Amazon); Ohad Shacham, Edward Bortnikov (Yahoo! Labs); Mark Silberstein (Technion)
  Analyzing and Leveraging Remote-core Bandwidth for Enhanced Performance in GPUs [Paper]
Mohamed Ibrahim, Hongyuan Liu (College of William & Mary); Onur Kayiran (Advanced Micro Devices, Inc.); Adwait Jog (College of William & Mary)
12:00pm-1:00pm Lunch Buffet (Room: Emerald Ballroom 2)
1:30pm-3:00pm Session 5A: Domain/Application-Specific Hardware/Software (Room: Emerald Ballroom 1)
Chair: P. (Saday) Sadayappan (University of Utah)
  Specialization Opportunities in Graphical Workloads [Paper]
Lewis Crawford, Michael O’Boyle (University of Edinburgh)
  FindeR: Accelerating FM-Index-based Exact Pattern Matching in Genomic Sequences through ReRAM technology [Paper]
Farzaneh Zokaee (Indiana University Bloomington); Mingzhe Zhang (Institute of Computing Technology, Chinese Academy of Sciences); Lei Jiang (Indiana University Bloomington)
  SLAMBooster: An Application-aware Online Controller for Approximation in Dense SLAM [Paper]
Yan Pei (The University of Texas at Austin); Swarnendu Biswas (Indian Institute of Technology Kanpur); Donald Fussell, Keshav Pingali (The University of Texas at Austin)
  Session 5B: Heterogeneous Systems and Accelerators 2 (Room: Emerald Ballroom 3)
Chair: Radu Teodorescu (Ohio State University)
  Exploring Memory Persistency Models for GPUs [Paper]
Zhen Lin, Mohammad Alshboul (North Carolina State University); Yan Solihin (University of Central Florida); Huiyang Zhou (North Carolina State University)
  Adaptive Task Aggregation for High-Performance Sparse Solvers on GPUs [Paper]
Ahmed E. Helal (Virginia Tech); Ashwin M. Aji, Michael L. Chu (AMD); Bradford M. Beckmann (Advanced Micro Devices, Inc); Wu-chun Feng (Virginia Tech)
  EDGE: Event-Driven GPU Execution [Paper]
Tayler Hetherington, Maria Lubeznov, Deval Shah, Tor M. Aamodt (The University of British Columbia)
3:00pm-3:30pm Coffee Break
3:30pm-4:30pm Session 6A: Compiler Optimization and Code Generation 2 (Room: Emerald Ballroom 1)
Chair: Gagan Agrawal (Ohio State University)
  Generating Portable High-Performance Code via Multi-Dimensional Homomorphisms [Paper]
Ari Rasch, Richard Schulze (University of Münster); Sergei Gorlatch (University of Muenster)
  Absinthe: Learning an Analytical Performance Model to Fuse and Tile Stencil Codes in One Shot [Paper]
Tobias Gysi, Tobias Grosser, Torsten Hoefler (ETH Zurich)
  Session 6B: Memory/Storage Systems 2 (Room: Emerald Ballroom 3)
Chair: Michael Spear (Lehigh University)
  Reducing Data Movement and Energy in Multilevel Cache Hierarchies without Losing Performance: Can you have it all? [Paper]
Jiajun Wang (ECE Dept, Univ. of Texas, Austin); Prakash Ramrakhyani, Wendy Elsasser (arm Research); Lizy John (ECE Dept, Univ. of Texas, Austin)
  Multiversioned Page Overlays: Enabling Faster Serializable Hardware Transactional Memory [Paper]
Ziqi Wang (Carnegie Mellon University); Vivek Seshadri (Microsoft Research India); Todd Mowry (Carnegie Mellon University); Michael Kozuch (Intel Labs and Carnegie Mellon University)
6:00pm-8:00pm Banquet (Room: Emerald Ballroom 2)
Day 3: September 25th, Wednesday
8:00am-12:00pm Registration (Room: Foyer 3)
7:30am-8:30am Continental Breakfast (Room: Emerald Foyer)
8:30am-9:30am Keynote – The 3rd Wall and the need for Innovation in Architectures (Room: Emerald Ballroom 1)
Speaker: Dr. Peter Kogge (University of Notre Dame)
Chair: Andrew Lumsdaine (Pacific Northwest National Laboratory)
9:30am-10:00am Coffee Break
10:00am-12:00pm Session 7: Parallel Algorithms and Applications (Room: Emerald Ballroom 1)
Chair: Antonino Tumeo (Pacific Northwest National Laboratory)
  Computing Three-dimensional Constrained Delaunay Refinement Using the GPU [Paper]
Zhenghai Chen, Tiow-Seng Tan (National University of Singapore)
  A Synchronization-Avoiding Distance-1 Grundy Coloring Algorithm for Power-Law Graphs [Paper]
Jesun Sahariar Firoz, Marcin Zalewski, Andrew Lumsdaine (Pacific Northwest National Lab)
  Accelerating DCA++ (Dynamical Cluster Approximation) Scientific Application on the Summit supercomputer [Paper]
Giovanni Balduzzi (ETH Zurich); Arghya Chatterjee, Ying Wai Li, Peter Doak (Oak Ridge National Laboratory); Urs Haehner (ETH Zurich); Ed D’Azevedo, Thomas Maier (Oak Ridge National Laboratory); Thomas Schulthess (ETH Zurich)
  A Methodology for Characterizing Sparse Datasets and Its Application to SIMD Performance Prediction [Paper]
Gangyi Zhu, Peng Jiang (The Ohio State University); Gagan Agrawal (Ohio State University)
10:00am-12:00pm Student Research Competition (SRC) Poster Session (Room: Belltown)