IA3 2016

Sixth Workshop on Irregular Applications:

Architectures and Algorithms

 


To be held in conjunction with                                                     To be held in cooperation with









November 13, 2016

Salt Lake City Convention Center

Room 251-D

Salt Lake City, UT


Preliminary Program


9:00 - 9:10      Welcome and Introduction

                        Antonino Tumeo, John Feo, Oreste Villa


9:10 - 9:50     Keynote 1 - Chair: Antonino Tumeo (PNNL)

                        High Level Abstractions and Automatic Optimization Techniques for the

                        programming of Irregular Algorithms

                        Prof. David Padua (UIUC)


9:50 - 10:00     Session 1: Parallel Graph Algorithms

                        Chair: Marco Minutoli (PNNL & WSU)

                        Fast Parallel Cosine K-Nearest Neighbor Graph Construction

                David Anastasiu and George Karypis


10:00 - 10:30  Coffee Break


10:30 - 11:10   Session 2: Compilers and Irregular Applications

                        Chair: Ruud Van Der Pas (Oracle)

10:30 - 10:50   Compiler Transformation to Generate Hybrid Sparse Computations

                Huihui Zhang, Anand Venkat and Mary Hall

10:50 - 11:10    An OpenCL Framework for Distributed Apps on a Multidimensional Network

                         of FPGAs

                 Abhijeet Lawande, Alan George and Herman Lam


11:10 - 10:50   Session 3: Irregular Algorithms on GPUs

                        Chair: Shaden Smith (University of Minnesota)

11:10 - 11:30   An Optimized Multicolor Point-Implicit Solver for Unstructured Grid

                        Applications on Graphics Processing Units

                Mohammad Zubair, Eric Nielsen, Justin Luitjens and Dana Hammond

11:30 - 11:40   Dynamic Load Balancing for High-Performance Graph Processing on Hybrid

                        CPU-GPU Platforms

                Stijn Heldens, Ana Lucia Varbanescu and Alexandru Iosup

11:40 -11:50    A Fast Level-Set Segmentation Algorithm for Image Processing Designed For

                        Parallel Architectures

                Julian Gutierrez, Fanny Nina Paravecino and David Kaeli


11:50 - 12:30  Session 4: Sparse Matrices and Tensors

                        Chair: Roger Pearce (LLNL)

11:50 - 12:10  Optimizing Sparse Tensor Times Matrix on Multi-core and Many-core

                        Architectures

               Jiajia Li, Yuchen Ma, Chenggang Yan and Richard Vuduc

12:10 - 12:20  Performance Evaluation of Parallel Sparse Tensor Decomposition         

                        Implementations

                        Thomas Rolinger, Tyler Simon and Christopher Krieger

12:20 - 12:30   HISC/R: An Efficient Hypersparse-Matrix Storage Format for Scalable Graph

                        Processing

                Robert Kirchgessner, Giovanni De La Torre, Alan George and Vitaliy

                Gleyzer


12:30 - 2:00      Lunch Break (on your own)


2:00 - 2:40       Keynote 2 - Chair: Oreste Villa (NVIDIA Research)

                        Memory Wants to be Free

                        Dr. Paolo Faraboschi (HPE)


2:40 - 3:00      Session 5: Emerging Architectures

                       Chair: Marco Minutoli (PNNL & WSU)

                       Highly Scalable Near Memory Processing with Migrating Threads on the Emu

                       System Architecture

                       Timothy Dysart, Peter Kogge, Martin Deneroff, Eric Bovell, Preston Briggs, Jay

                       Brockman, Kenneth Jacobsen, Yujen Juan, Shannon Kuntz, Richard Lethin,

                       Janice McMahon, Chandra Pawar, Martin Perrigo, Sarah Rucker, John

                       Ruttenberg, Max Ruttenberg and Steve Stein


3:00 - 3:30     Coffee Break


3:30 - 4:00     Session 6: Irregular Algorithms on Novel Processors

                       Chair: John Leidel (Texas Tech University)

3:30 - 3:50     Parallel Interval Stabbing on the Automata Processor

              Indranil Roy, Ankit Srivastava, Matt Grimm and Srinivas Aluru

3:50 - 4:00     Implementation and evaluation of data-compression algorithms for irregular-grid

                      iterative methods on the PEZY-SC processor

             Naoki Yoshifuji, Ryo Sakamoto, Keigo Nitadori and Jun Makino


4:00 - 4:20     Session 7: Runtimes and Irregularity

                      Chair: John Feo (PNNL)

4:00 - 4:10     Fine-grained parallelism in probabilistic parsing with Habanero Java

                      Matthew Francis-Landau, Bing Xue, Vivek Sarkar and Jason Eisner

4:10 - 4:20     Optimized Distributed Work-Stealing

                      Vivek Kumar, Karthik Murthy, Vivek Sarkar and Yili Zheng


4:20 - 5:30     Debate - Moderator: Andrew Lumsdaine (PNNL)

                       Proposition: “Regular data structures, such as matrices and tables, are

                       sufficient to support analysis and inferencing of semantic data for causality."

                      Panelists: Torsten Hoefler (ETH), Timothy Mattson (Intel),

                      Alessandro Morari (IBM), David Padua (UIUC), Ruud Van Der Pas (Oracle)