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Keynote 1

Photonic Interconnects for Extreme Scale Computing

Madeleine Glick
Columbia University

The capabilities of large-scale high-performance computing systems, either as supercomputers or warehouse scale data centers, are increasingly pervasive in different areas of modern life, from weather predictions to film and fashion recommendations. New applications using data intensive computations are putting more stress on the interconnection network at the same time that Moore’s Law is slowing. advances in transistor density. As a consequence, the high bandwidth interconnects, essential for maintaining computation performance, are representing an increasing portion of the total energy and cost budgets.
 
It is widely accepted that new approaches are required to meet the new challenges. Photonic interconnection networks, with recent advances in integrated silicon photonics offer an opportunity to overcome limitations of conventional electrical wires to solve bottlenecks and improve interconnect performance. Beyond alleviating the bandwidth and energy bottlenecks, embedded photonics can enable new disaggregated architectures that leverage the distance independence of optical transmission. In this talk, I will present an overview of recent photonic advances and discuss how we can use emerging photonics technologies to increase resource utilization and reduce energy consumption.

Mobirise

Madeleine Glick is a Senior Research Scientist at the Lightwave Research Laboratory of the Columbia Nano Initiative, Columbia University. She received her Ph.D. in Physics at Columbia University after which she joined the Department of Physics, Ecole Polytechnique Federale de Lausanne (EPFL) Lausanne, Switzerland, where she con-tinued research in electro-optic effects in GaAs and InP-based materials. From 1992 to 1996, she was a Research Associate with CERN, Geneva, Switzerland, as part of the Lightwave Links for Analogue Signal Transfer Project for the Large Hadron Collider. From 2002-2011 Madeleine was Principal Engineer at Intel (Intel Research Cambridge UK, Intel Research Pittsburgh) leading research on optical interconnects for data centers. Her research interests are in applying photonic devices and interconnects to computing systems. Madeleine is a Fellow of the Institute of Physics, and a Senior Member of IEEE and OSA.

Keynote 2

Versal: The new Xilinx Adaptive Compute Acceleration Platforms (ACAP)

Kees Vissers
Xilinx

In this presentation I will present the new Adaptive Compute Acceleration Platform. I will show the overall system architecture of the family of devices including the Arm cores (scalar engines), the programmable logic (Adaptable Engines) and the new vector processor cores (AI engines). I will focus on the new AI engines in more detail and show the concepts for the programming environment, the architecture, the integration in the total device, and some application domains, including Machine Learning and 5G wireless applications. I will illustrate the initial design rationale and the architecture trade-offs. These platforms extend the concept of tuning the memory hierarchy to the problem.
Mobirise

Kees Vissers graduated from Delft University in the Netherlands. He worked at Philips Research in Eindhoven, the Netherlands, for many years. The work included Digital Video system design, HW–SW codesign, VLIW processor design and dedicated video processors. He was a visiting industrial fellow at Carnegie Mellon University, where he worked on early High-Level Synthesis tools. He was a visiting industrial fellow at UC Berkeley where he worked on several models of computation and dataflow computing. He was a director of architecture at Trimedia, and CTO at Chameleon Systems. For more than a decade he is heading a team of researchers at Xilinx, including a significant part of the Xilinx European Laboratories. The research topics include next generation programming environments for processors and FPGA fabric, high-performance video systems, machine learning applications and architectures, wireless applications and new datacenter applications. He has been instrumental in the High-Level Synthesis technology and one of the technical leads in the novel ACAP technology. He is now a Fellow at Xilinx.