| Time | Event |
|---|---|
| 8:30 - 8:35 | Welcome and Introduction Antonino Tumeo (PNNL), Marco Minutoli (PNNL), Vito Giovanni Castellana (PNNL), John Feo (PNNL) |
| 8:35 - 9:10 | Invited Talk 1 - Architecture. Chair: Antonino Tumeo (PNNL) Efficient Processing of Large Graph Applications Using Asynchronous Architectures Michel Kinsy (Arizona State University) |
| 9:10 - 10:00 9:10 - 9:30 9:30 - 9:50 9:50 - 10:00 | Paper Session 1. Chair: Ankur Limaye (PNNL) Page-Address Coalescing of Vector Gather Instructions for Efficient Address Translation Takayashiki, Sato, Komatsu, Kobayashi The Evolution of a New Model of Computation Page, Kogge Blocking Sparse Matrices to Leverage Dense-Specific Multiplication Sylos Labini, Vella, Bernaschi, Silvestri, Nutt |
| 10:00 - 10:30 | Coffee Break |
| 10:30 - 11:05 | Invited Talk 2 - Algorithms. Chair: Marco Minutoli (PNNL) Parallel Batch-Dynamic Graph Algorithms Julian Shun (Massachusetts Institute of Technology) |
| 11:05 - 11:55 11:05 - 12:25 11:25 - 11:45 11:45 - 11:55 | Paper Session 2. Chair: Nicolas Bohm Agostini (PNNL) SparseLU, A Novel Algorithm and Math Library for Sparse LU Factorization Valero-Lara, Greenwalt, Vetter Compressed In-Memory Graphs for Accelerating GPU-Based Analytics Azami, Burtscher Accelerating Datalog Applications with cuDF Shovon, Dyken, Green, Gilray, Kumar |
| 11:55 - 12:00 | Closing Remaks Antonino Tumeo (PNNL), Marco Minutoli (PNNL), Vito Giovanni Castellana (PNNL), John Feo (PNNL) |
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