Invited Talk 1

Project 38: Innovative Architectures for High-Performance Computing Systems

Dr. Eric Cheng
(Laboratory of Physical Sciences)

The high-performance computing (HPC) needs of the US government require advances in architectures to support a wide variety of critical missions. Project 38 is a cross-agency effort between the Department of Defense and the Department of Energy exploring architectural enhancements that will provide increased performance and capabilities for future HPC systems. This talk will provide an overview of some of the explorations that have been conducted as part of this effort, their potential impact, and the path forward.
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Eric Cheng is a researcher at the Laboratory for Physical Sciences where he leads the computer architecture research team. His research focuses on innovative architectures and technologies to advance high-performance computing systems. He received his BS in Electrical and Computer Engineering from Carnegie Mellon University and his MS and PhD in Electrical Engineering from Stanford University.

Invited Talk 2

Implementing Performance Portable Graph Algorithms Using Task-Based Execution

Prof. Ümit V. Çatalyürek
(Georgia Institute of Technology)
(work in collaboration with Abdurrahman Yaşar)

Designing flexible graph kernels that can run well on various platforms is a crucial research problem due to the frequent usage of graphs for modeling data and recent architectural advances and variety. In this talk, I will present our recent graph processing model and framework, PGAbB, for modern shared-memory heterogeneous platforms. PGAbB implements a block-based programming model. This allows a user to express a graph algorithm using functors that operate on an ordered list of blocks (subgraphs). Our framework deploys these computations to all available resources in a heterogeneous architecture. We will demonstrate that one can implement a diverse set of graph algorithms in our framework, and task-based execution enables graph computations even on large graphs that do not fit in GPU device memory. Our experimental results show that PGAbB achieves competitive or superior performance compared to hand-optimized implementations or existing state-of-the-art graph computing frameworks.
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Ümit V. Çatalyürek holds concurrent appointments as an Amazon Scholar and as a Professor of the Computational Science and Engineering at the Georgia Institute of Technology. This talk describes work performed at Georgia Tech and is not associated with Amazon. Dr. Çatalyürek received his Ph.D., M.S. and B.S. in Computer Engineering and Information Science from Bilkent University, Turkey, in 2000, 1994 and 1992, respectively. He is a Fellow of IEEE and SIAM. He was the elected Chair for IEEE TCPP for 2016-2019, as Vice-Chair for ACM SIGBio for 2015-2021 terms. He also serves as the member of Board of Trustees of Bilkent University. Dr. Çatalyürek currently serves as the Editor-in-Chief for Parallel Computing. In the past, he served on the editorial boards of the IEEE Transactions on Parallel and Distributed Computing, the SIAM Journal of Scientific Computing, Journal of Parallel and Distributed Computing, and Network Modeling and Analysis in Health Informatics and Bioinformatics. Dr. Çatalyürek serves on the program committees and organizing committees of numerous international conferences. Dr. Çatalyürek is a recipient of an NSF CAREER award and is the primary investigator of several awards from the Department of Energy, the National Institute of Health, and the National Science Foundation. He has co-authored more than 200 peer-reviewed articles, invited book chapters and papers. His main research areas are in parallel computing, combinatorial scientific computing and biomedical informatics. More information about Dr. Çatalyürek and his research group can be found at http://cc.gatech.edu/~umit and http://tda.gatech.edu.

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