Third International Workshop on Energy Efficient Supercomputing (E2SC)

E2SC 2015 Preliminary Program

9:00 AM - 9:15 AMWelcome and Workshop Introduction

9:15 AM - 10:00 AMKeynote: Energy Efficiency and Scalability of the TrueNorth Neurosynaptic Processor
Jun Sawada
IBM Almaden Research Center.

10:00 AM - 10:30 AMBreak

Session 1Chair: Joseph Manzano, Pacific Northwest National Laboratory
Location: Hilton Salon F

10:30 AM - 11:00 AMTowards the Development of Hierarchical Data Motion Power Cost Models
Tiffany M Mintz, and Oluwatosin O. Alabi
Oak Ridge National Laboratory, Purdue University

11:00 AM - 11:30 AMTowards an Application Specific Thermal Energy Model of Current Processors
Vladimir Getov, Darren Kerbyson, Matthew MacDuff, and Adolfy Hoisie
University of Westminster, Pacific Northwest National Laboratory

11:30 AM - 12:00 PMExperimental Design and Comparative Testing of a Hybrid Cooled Computer Cluster
Amanda Bonnie
Los Alamos National Laboratory

12:00 PM - 12:30 PMAdaptive Precision Solvers for Sparse Linear Systems
Hartwig Anzt, Jack Dongarra, and Enrique S. Quintana-Orti
Innovative Computing Laboratory, University of Tennessee, Universidad Jaime I

12:30 PM - 2:00 PMLunch
Not Provided

Session 2Chair: Vladimir Getov, University of Westminster
Location: Hilton Salon F

2:00 AM - 2:30 PMMeasurement and Characterization of Haswell Power and Energy Consumption
Song Huang, Michael Lang, Scott Pakin, and Sonfg Fu
University of North Texas, Los Alamos National Laboratory

2:30 PM - 3:00 PMCompute Bottlenecks on the New 64-bit ARM
Adam Jundt, Allyson Cauble-Chantrenne, Ananta Tiwari, Laura Carrington, Michael Laurenzano, and Joshua Peraza
EP Analytics, San Diego Super Computing Center, University of Michigan

3:00 PM - 3:30 PMBreak

Session 3Chair: Tapasya Patki, Lawrence Livermore National Laboratory
Location: Hilton Salon F

3:30 PM - 4:00 PMEarly Experiences with Node-Level Power Capping on the Cray XC40 Platform
Kevin Pedretti, Stephen Olivier, Kurt Ferreira, Galen Shipman, and Wei Shu
Sandia National Laboratory, Los Alamos National Laboratory, University of New Mexico

4:00 PM - 5:00 PMPanel: How much of a role software plays in energy efficiency?
Chair: Adolfy Hoisie (Pacific Northwest National Laboratory)
Panelists: Kirk W. Cameron (Virginia Tech, USA), Georg Hager (Erlangen Regional Computing Center, Germany), Eric Van Hensbergen (ARM Research, USA), Dhabaleswar K. (DK) Panda (Ohio State University, USA), Jun Sawada (IBM Almaden Research Center, USA)

Keynote Information

Title: Energy Efficiency and Scalability of the TrueNorth Neurosynaptic Processor


Inspired by biological brains, we built a semiconductor chip called the TrueNorth processor, which is equipped with 4096 computing cores, one million digital neurons and 256 million binary synapses. This chip can run various types of neural networks while consuming 65mW of power. This extreme efficiency is achieved by the architectural choice of moving data around as little as possible. We further reduced the power consumption by using asynchronous event-driven circuits in the chip implementation. The TrueNorth processor scales naturally to multi-chip systems with its built-in chip-to-chip communication interface. This allows us to envision a neurosynaptic supercomputer that matches mammalian brains in scale within a realistic power budget.


Jun Sawada received the B.S. and M.S. degrees in mathematics from Kyoto University, Kyoto, Japan, and the Ph.D. degree in computer sciences from the University of Texas at Austin, Austin, TX, USA, for the study in formal verification of hardware, VLSI microarchitecture, automated theorem proving and automated reasoning. He has been a Research Staff Member at IBM Research since 2000. At IBM, he participated in many chip development projects, including the ones for Power microprocessors and BlueGene supercomputers, and pioneered the application of formal verification technologies to large scale microprocessor designs. Recently he has been working on neurosynaptic chip and system designs, and took a leading role in the development team of the TrueNorth chip.

Proceedings available at the ACM Digital Library

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Workshop in Cooperation with SIGHPC
Disclaimer: The BlueGene P supercomputer photo comes from Argonne National Laboratory's Flickr page, the oscilloscope and voltmeter photos come from the wikimedia commons and the ALMA correlator photo comes from ALMA (ESO/NAOJ/NRAO). These pictures are released under Creative Commons Attribution-Share Alike 3.0 Unported license.