SEAK Workshop Program
June 7th, 2015
San Francisco, California, USA

9:00 AM - 9:45 AMKeynote:
Controlling Timing vs. Measuring Timing		Edward A. Lee, UC Berkeley
9:45 AM - 10:45 PMSession 1: The SEAK Program
  • Overview of SEAK
Joseph Cross, DARPA
  • SEAK Objectives and Constraining Problems
Adolfy Hoisie, PNNL
  • SEAK Analysis and Early Evaluation
Darren Kerbyson, PNNL
10:45 AM - 11:15 AMCoffee Break
11:15 AM - 12:15 PMSession 2: Mission Critical Applications
  • Embedded Constraining Problems in Aerospace Applications
Gary Ray, Boeing
  • Constraining Problem Classification and Characterization
Jeffrey Smith, BAE
12:15 PM - 13:00 PMLunch Break (Provided)
13:00 PM - 14:00 PMSession 3: Poster Session
  1. "Characterization of Accelerated 2D FFT with Off-Chip Optical Channels and Kernel Adaptation for Efficient Utilization."Ke Wen, Sebastien Rumley, Paolo Mantovani, Luca Carloni and Keren Bergman. (Columbia University)
  2. "Rosetta: A Realistic Benchmark Suite for Software Programmable FPGAs."Udit Gupta, Steve Dai and Zhiru Zhang (Cornell University)
  3. "Microbenchmarks for runtime characterization of workloads on heterogeneous embedded architectures."Tiago Rogerio Muck, Santanu Sarma and Nikil Dutt (University of California, Irvine)
  4. "Power Instrumentation and Monitoring of Current Processors."Vladimir Getov (University of Westminster), Matt Macduff and Darren J. Kerbyson (Pacific Northwest National Laboratory)
  5. "SEAK: Suite of Embedded Applications and Kernels"Erin Barker, Nitin Gawande, Adolfy Hoisie, Senghwa Kang, Joseph Manzano, Darren J. Kerbyson, Nathan Tallent (Pacific Northwest National Laboratory)
14:00 PM - 15:00 PMSession 4: Implications of new technologies on power and performance tradeoffs of embedded systems
  • A Scalable Methodology for Embedded Scalable Platforms
Luca Carloni, Columbia University
  • High Performance Embedded Processors.A Case Study
Trevor Mudge, University of Michigan
15:00 PM - 15:30 PMCoffee Break
15:30 PM - 16:30 PMSession 5: Implications of design automation on power and performance tradeoffs of embedded systems
  • Programming Software-Defined FPGAs: Progress and Roadblocks
Zhiru Zhang, Cornell University
  • Technology, EDA and System Power Optimizations with a Cross-Layer Case Study
 David Z. Pan, University of Texas, Austin
16:30 PM - 17:30 PMPanel Session: Disruptive technologies for embedded systems
Moderator: Adolfy Hoisie (Pacific Northwest National Laboratory)

Panelists: Joseph Cross (DARPA), Luca Carloni (Columbia University), Edward Lee (UC Berkeley), Reiley Jeyapaul (ARM), Trevor Mudge (University of Michigan)

SEAK Workshop Keynote

Title: Controlling Timing vs. Measuring Timing
Presentor: Edward A. Lee, UC Berkeley
Abstract:

Embedded systems differ from many general purpose and scientific computing applications in that repeatability is often more important than performance. The goal in an embedded system is not usually to get a task done as soon as possible, but rather to get a task done reliably, on time, and with minimal energy consumption. Benchmarking, however, is typically focused on performance, not repeatability. In this talk, I will argue that when the primary goal is repeatability, design decisions can be very different, and benchmarking needs to be done differently. I will describe the Berkeley PRET project, which shows that embedded processors can be designed to deliver repeatable timing, and with appropriately adjusted measures, with no loss in performance.