Workshop on Multithreaded Architectures and Applications

Held in Conjunction with the
International Parallel and Distributed Processing Symposium (IPDPS 2007)

Long Beach, California, March 30, 2007

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Workshop Organization


Luiz DeRose (Cray)

Jarek Nieplocha (PNNL)

Program Committee

David Bader (Georgia Tech)
Frank Baetke (HP)
Calin Cascaval (IBM)
Barbara Chapman (U. Houston)
John Feo (Cray)
Guang Gao (U. Delaware)
Bruce Hendrickson (Sandia National Laboratory)
Andres Marquez (Pacific Northwest National Laboratory)
Michael Merrill (DoD)
Jose Moreira (IBM)
Walid Najjar (U. California Riverside)
Fabrizio Petrini (Pacific Northwest National Laboratory)
Josep Torellas (University of  Illinois) 
Mateo Valero (Universitat Politècnica de Catalunya)
Jeff Vetter (Oak Ridge National Laboratory, Georgia Tech)


Multithreading (MT) programming and execution models are starting to permeate the high-end and mainstream computing scene. This trend is driven by the need to increase processor utilization and deal with the memory-processor speed gap. Recent and upcoming examples architectures that fit this profileare Cray's Eldorado, IBM Cyclops, and several SMT processors from Sun (UltraSparc T1), IBM (Power5+, Power6), Intel (Xeon with hyperthreading). The underlying rationale to increase processor utilization is a varying mix of new metrics that take performance improvements as well as better power and cost budgeting into account. Yet, it remains a challenge to identify and productively program applications for these architectures with a resulting substantial performance improvement. This workshop intends to identify applications that are amenable to MT and the MT programming and execution models as well as the underlying architectures on which they can thrive. The workshop seeks to explore programming frameworks in the form of MT languages and libraries, compilers, analysis and debugging tools to increase the programming productivity.

Topics of Interest

Topics of interest are guided by their application impact and include but are not limited to following topics:

Results of both theoretical and practical significance will be considered.


I. 8:30-8:45am:  Welcome Message 
II. 8:45-9:45am: Keynote Talk - Michael Merrill, DoD
III. 9:45-11:00: Architectures. Sesion chair: Scott Pakin (Los Alamos)
      11:00-11:15  Break

IV. 11:15-12:30  Programming Models and Performance. Sesion chair:  Martin Schultz (LLNL)        
      12:30-2:00pm  Lunch

V.  2:00-3:15pm Algorithms
. Sesion chair: David Bader (Georgia Tech)
      3:15-3:45pm: Break

VI. 3:45-5:00pm: Applications. Sesion chair: Keith Underwood (Sandia)


The proceedings of this workshop have been published together with the proceedings of other IPDPS 2007 workshops by the IEEE Computer Society Press. 

Paper Submissions (Closed)

Submitted manuscripts may not exceed 20 single-spaced pages using a 12-point font on 8½×11-inch pages, everything included (figures, tables, references, etc.). Manuscripts must be submitted electronically and in either PostScript or PDF format. Submissions will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the workshop attendees. Submitted papers may not have appeared in or be under consideration for another workshop, conference, or journal.

MTAAP submissions are being handled by EDAS system. To submit a paper, please use the following link and follow the instructions.

Important Dates

Papers due:

23 December 2006

PC reviews due:

7 January 2007

Notification of acceptance:

10 January 2007

Camera-ready due:

22 January 2007

Additional Information

E-mail Contact

For more information on MTAAP 2007 or if you have any questions please contact the workshop organizers at the e-mail address listed at the bottom of this page.